In recent years, an electron microscope has been applied to the dimension measurement or defect inspection of a semiconductor-device pattern. The electron microscope is an apparatus for detecting electrons which are obtained by irradiating the sample with a narrowly-focused electron beam. By doing this, the electron microscope performs formation of the sample's image, or the dimension measurement or defect inspection of the semiconductor-device pattern. In general, the electron beam whose accelerating energy is higher allows implementation of formation of the higher-resolution image. In contrast thereto, the higher-accelerating-energy electron beam, in some cases, gives rise to occurrence of the sample's electrification, or occurrence of damage to the sample. As a technique for solving mutually-contradictory problems like this, there exists the following retarding technology:
The retarding technology is the technique of applying a negatives voltage to the sample, and thereby forming, on the sample, a decelerating electric field to be exerted onto the electron beam. Namely, it turns out that the electron beam, which has passed through an objective lens while maintaining its higher accelerating energy, is decelerated immediately before the electron beam has attained the sample. According to the retarding technology for lowering the attainment energy to the sample in this way, it becomes possible to implement the compatibility between the high-resolution implementation of the image and supersession of the damage to the sample.
Meanwhile, of semiconductor devices, there exists a semiconductor device whose surface is covered with an insulating film such as an oxide film or nitride film. This covering with the insulating film, in some cases, makes it impossible to properly apply the retarding voltage to the semiconductor device. In response thereto, conventional technologies for bringing the insulating-film-covered sample into electrical conduction are explained in Patent Literature 1 and Patent Literature 2. In Patent Literature 1, a technique is explained which breaks through the insulating layer by pushing and pressing conduction pins onto the semiconductor wafer. In Patent Literature 2, a technique is explained which reduces the contact resistance between a ground electrode and the sample by clarifying the insulating film. Here, clarifying the insulating film is performed by flowing a leakage current from the ground electrode which is in contact with the sample.